Various attempts are made so as to satisfy the requirements of increasing the capacity of a semiconductor memory and developing the function of the semiconductor memory. With the increase of the capacitor of the semiconductor memory, a plurality of thinner semiconductor chips are prepared and stacked so as to increase of the total capacity of the semiconductor memory in addition to the increase of the capacity of the semiconductor chip constituting the semiconductor memory. With the development of the semiconductor memory, a plurality of semiconductor chips with respective different functions are prepared and stacked to realize a semiconductor memory which can exhibit different functions.
In a conventional stacked semiconductor package where a plurality of semiconductor chips are stacked as described above, one or more of the semiconductor chips are electrically connected with a board by means of wiring and the semiconductor chips are electrically connected with one another by means of wiring. In the wiring electric connection, however, the wires to be used are shaped in loop so as to prevent unnecessary electric connection with other parts (such as the corner of each semiconductor chip) except the electrodes and the occurrence of leak current. As a result, the total thickness of the semiconductor package is increased.
In this point of view, it is proposed that the semiconductor chips are electrically connected with one another by a wiring layer formed at the side of the stacking structure of the semiconductor chips (e.g., refer to JP-A2004-63569 (KOKAI)). In this case, however, in order to prevent the electric connection between other parts of the semiconductor chips except the electrodes thereof, particularly between the side of the stacking structure of the semiconductor chips and the wiring layer, an insulating layer is formed between the side of the stacking structure and the wiring layer so as to form the electric insulation between the side of the stacking structure and the wiring layer.
However, after the semiconductor chips are stacked, the insulating layer is formed per semiconductor chip. Concretely, the insulating layer is formed at the side of each semiconductor chip. Therefore, it is required that the forming process of the insulating layer is carried out for all of the semiconductor chips to be stacked. Since the number of the forming process of the insulating layer is increased as the number of the semiconductor chips to be stacked is increased, the manufacturing process of the stacked semiconductor package becomes complicated as a whole so as to increase the manufacturing cost of the stacked semiconductor package.
Moreover, since the insulating layer is made of a thermosetting resin, it is required that the assembly under construction including the board is thermally treated as a whole. As a result, the assembly suffers from the thermal treatment several times so that the board and/or one or more of the semiconductor chips may be warped and the characteristics of one or more of the semiconductor chips may be changed.
In the stacking of the semiconductor chips, the adjacent ones of the semiconductor chips are bonded with one another with adhesive. In this case, however, the adhesive may be peeled off by the several thermal treatments so that the adjacent ones of the semiconductor chips are imperfectly bonded with one another.